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1:2 Single-Ended, Low Cost, Active RF Splitter ADA4304-2
FEATURES
Ideal for CATV and terrestrial applications Excellent frequency response 1.6 GHz, -3 dB bandwidth 1 dB flatness to 1.0 GHz Low noise figure: 4.0 dB Low distortion Composite second order (CSO): -62 dBc Composite triple beat (CTB): -72 dBc 1 dB compression point of 8.25 dBm 2.8 dB of gain per output channel 25 dB output-to-output isolation, 50 MHz to 1000 MHz 75 input and outputs Integrated output resistors Small package size: 16-lead, 3 mm x 3 mm LFCSP
FUNCTIONAL BLOCK DIAGRAM
5V 5V 0.1F 1H 0.1F
VCC
IL
VOUT1 VIN
0.01F
ADA4304-2
VOUT2
0.01F
0.01F GND
06539-001
APPLICATIONS
Set-top boxes Residential gateways CATV distribution systems Splitter modules Digital cable ready (DCR) TVs
Figure 1.
GENERAL DESCRIPTION
The ADA4304-2 is a 75 active splitter for use in applications where a lossless signal split is required. Typical applications include multituner digital set-top boxes, cable splitter modules, multituner/digital cable ready (DCR) televisions, and home gateways where traditional solutions require discrete passive splitter modules with separate fixed gain amplifiers. The ADA4304-2 is fabricated using Analog Devices, Inc. proprietary silicon-germanium (SiGe), complementary bipolar process, enabling it to achieve very low levels of distortion with a noise figure of 4 dB. The part provides a low cost alternative that simplifies designs and improves system performance by integrating a signal splitter element and a gain block into a single IC. The ADA4304-2 is available in a 16-lead LFCSP and operates in the extended industrial temperature range of -40C to +85C.
4 3 2 1 0 TA = +85C TA = +25C TA = -40C
GAIN (dB)
-1 -2 -3 -4 -5 -6 -7 100 1000 FREQUENCY (MHz) 4000
06539-011
-8 50
Figure 2. Gain (S21, S31) vs. Frequency
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 (c)2007 Analog Devices, Inc. All rights reserved.
ADA4304-2 TABLE OF CONTENTS
Features .............................................................................................. 1 Applications....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Absolute Maximum Ratings............................................................ 4 Thermal Resistance ...................................................................... 4 ESD Caution.................................................................................. 4 Pin Configuration and Function Descriptions............................. 5 Typical Performance Characteristics ..............................................6 Test Circuits........................................................................................8 Applications........................................................................................9 Circuit Description .......................................................................9 Evaluation Boards .........................................................................9 RF Layout Considerations............................................................9 Power Supply..................................................................................9 Outline Dimensions ....................................................................... 11 Ordering Guide .......................................................................... 11
REVISION HISTORY
5/07--Revision 0: Initial Version
Rev. 0 | Page 2 of 12
ADA4304-2 SPECIFICATIONS
VCC = 5 V, 75 system, TA = 25C, unless otherwise noted. Table 1.
Parameter DYNAMIC PERFORMANCE Bandwidth (-3 dB) Specified Frequency Range Gain (S21, S31) 1 dB Gain Flatness NOISE/DISTORTION PERFORMANCE Noise Figure 1 Conditions Min Typ 1600 54 f = 100 MHz; see Figure 17 and Figure 18 2.8 1000 4.0 4.5 4.6 26 44.5 -72 -62 -69 865 Max Unit MHz MHz dB MHz dB dB dB dBm dBm dBc dBc dBc
Output IP3 Output IP2 Composite Triple Beat (CTB) Composite Second Order (CSO) Cross Modulation (CXM) INPUT CHARACTERISTICS Input Return Loss (S11)
Output-to-Input Isolation (S12, S13)
OUTPUT CHARACTERISTICS Output Return Loss (S22, S33)
Output-to-Output Isolation (S23, S32)
1 dB Compression (P1dB) POWER SUPPLY Nominal Supply Voltage Quiescent Supply Current
1
@ 54 MHz @ 550 MHz @ 865 MHz f1 = 97.25 MHz, f2 = 103.25 MHz f1 = 97.25 MHz, f2 = 103.25 MHz 135 channels, 15 dBmV/channel, f = 865 MHz 135 channels, 15 dBmV/channel, f = 865 MHz 135 channels, 15 dBmV/channel, 100% modulation @ 15.75 kHz, f = 865 MHz See Figure 17, Figure 18, and Figure 19 @ 54 MHz @ 550 MHz @ 865 MHz Either output, 54 MHz to 865 MHz @ 54 MHz @ 550 MHz @ 865 MHz See Figure 17, Figure 18, and Figure 19 Either output, 54 MHz to 865 MHz @ 54 MHz @ 550 MHz @ 865 MHz Either output, 54 MHz to 865 MHz @ 54 MHz @ 550 MHz @ 865 MHz Output referred, f = 100 MHz 4.75
-15 -35.5 -13.3 -32 -32 -33
-11 -22 -8 -30 -29 -31
dB dB dB dB dB dB
-26.7 -22 -20 -26.7 -25.1 -25 8.25 5.0 88
-21 -15 -12
dB dB dB dB dB dB dB dBm V mA
5.25 105
Characterized with 50 noise figure analyzer.
Rev. 0 | Page 3 of 12
ADA4304-2 ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter Supply Voltage Power Dissipation Storage Temperature Range Operating Temperature Range Lead Temperature (Soldering, 10 sec) Junction Temperature Rating 5.5 V See Figure 3 -65C to +125C -40C to +85C 300C 150C
The power dissipated in the package (PD) is essentially equal to the quiescent power dissipation; the supply voltage (VS) times the quiescent current (IS). In Table 1, the maximum power dissipation of the ADA4304-2 can be calculated as PD (MAX) = 5.25 V x 105 mA = 551 mW Airflow increases heat dissipation, effectively reducing JA. In addition, more metal directly in contact with the package leads/exposed pad from metal traces, through-holes, ground, and power planes reduces the JA. Figure 3 shows the maximum safe power dissipation in the package vs. the ambient temperature for the 16-lead LFCSP (98C/W) on a JEDEC standard 4-layer board.
2.0 1.8
MAXIMUM POWER DISSIPATION (W)
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2
06539-004
THERMAL RESISTANCE
JA is specified for the device (including exposed pad) soldered to a high thermal conductivity 2s2p circuit board, as described in EIA/JESD 51-7. Table 3. Thermal Resistance
Package Type 16-Lead LFCSP (Exposed Pad) JA 98 Unit C/W
0
0
10
20
30
40
50
60
70
80
90
100
Maximum Power Dissipation
The maximum safe power dissipation in the ADA4304-2 package is limited by the associated rise in junction temperature (TJ) on the die. At approximately 150C, which is the glass transition temperature, the plastic changes its properties. Even temporarily exceeding this temperature limit can change the stresses that the package exerts on the die, permanently shifting the parametric performance of the ADA4304-2. Exceeding a junction temperature of 150C for an extended period can result in changes in the silicon devices, potentially causing failure.
AMBIENT TEMPERATURE (C)
Figure 3. Maximum Power Dissipation vs. Temperature for a 4-Layer Board
ESD CAUTION
Rev. 0 | Page 4 of 12
ADA4304-2 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
16 VCC 15 VCC 14 IL 13 NC
VCC 1 VCC 2 GND 3 VIN 4
PIN 1 INDICATOR
12 VOUT1 11 GND 10 VOUT2 9 GND
ADA4304-2
TOP VIEW (Not to Scale)
GND 5
GND 6
GND 7
NC 8
NC = NO CONNECT
Figure 4. Pin Configuration
Table 4. Pin Function Descriptions
Pin No. 1, 2, 15, 16 3, 5 to 7, 9, 11 4 8, 13 10 12 14 Mnemonic VCC GND VIN NC VOUT2 VOUT1 IL Description Supply Pin Ground Input No Connection Output 2 Output 1 Bias Pin
Rev. 0 | Page 5 of 12
06539-002
ADA4304-2 TYPICAL PERFORMANCE CHARACTERISTICS
VCC = 5 V, 75 system, TA = 25C, unless otherwise noted.
-54 -56 -58
10
50 SYSTEM
8
NOISE FIGURE (dB)
-60
CSO (dBc)
-62 -64 -66 -68 -70 -72
TA = +85C
6
TA = +85C
TA = +25C
TA = -40C TA = +25C
4 TA = -40C 2
100 FREQUENCY (MHz)
1000
FREQUENCY (MHz)
Figure 5. Composite Second Order (CSO) vs. Frequency
-60 -63 -66 50 60 55
Figure 8. Noise Figure vs. Frequency
OUTPUT IP2 (dBm)
-69
CTB (dBc)
-72 -75 -78 -81 -84 -87 TA = +25C TA = -40C TA = +85C
45 40 35 30 25 20 50
100 FREQUENCY (MHz)
1000
FREQUENCY (MHz)
Figure 6. Composite Triple Beat (CTB) vs. Frequency
-60 -63 -66
Figure 9. Output IP2 vs. Frequency
40 35 30
OUTPUT IP3 (dBm)
-69
CXM (dBc)
-72 -75 -78 -81 -84 -87
25 20 15 10 5 0 50
TA = +85C
TA = -40C
TA = +25C
50
100 FREQUENCY (MHz)
1000
06539-006
100 FREQUENCY (MHz)
1000
Figure 7. Cross Modulation (CXM) vs. Frequency
Figure 10. Output IP3 vs. Frequency
Rev. 0 | Page 6 of 12
06539-010
-90
06539-009
50
100
1000
06539-007
-90
06539-008
50
100
1000
06539-005
-74
0 50
ADA4304-2
4 3 2 TA = +25C TA = +85C TA = -40C
0 -5
0
INPUT RETURN LOSS (dB)
1
-10 -15 -20 -25 -30 -35 -40 50
GAIN (dB)
-1 -2 -3 -4 -5 -6 -7 100 1000 FREQUENCY (MHz) 4000
06539-011
100 FREQUENCY (MHz)
1000
Figure 11. Gain (S21, S31) vs. Frequency
-30 -31 0 -5
Figure 14. Input Return Loss (S11) vs. Frequency
OUTPUT RETURN LOSS (dB)
-32 -33
-10 -15 -20 -25 -30 -35 -40 50
ISOLATION (dB)
-34 -35 -36 -37 -38 -39
06539-012
100
1000 FREQUENCY (MHz)
4000
100 FREQUENCY (MHz)
1000
Figure 12. Output-to-Input Isolation (S12, S13) vs. Frequency
0 -5 -10
Figure 15. Output Return Loss (S22, S33) vs. Frequency
95
QUIESCENT SUPPLY CURRENT (mA)
90
ISOLATION (dB)
-15 -20 -25 -30 -35 -40
06539-013
85
80
75
100
1000 FREQUENCY (MHz)
4000
TEMPERATURE (C)
Figure 13. Output-to-Output Isolation (S23, S32) vs. Frequency
Figure 16. Quiescent Supply Current vs. Temperature
Rev. 0 | Page 7 of 12
06539-016
-45 50
70 -60 -50 -40 -30 -20 -10 0
10 20 30 40 50 60 70 80 90 100
06539-015
-40 50
06539-014
-8 50
ADA4304-2 TEST CIRCUITS
RF NETWORK ANALYZER
75 S-PARAMETER TEST SET
VOUT1 VIN
4 12
PORT 2
DUT
10
PORT 1
VOUT2 75
06539-017
PORT 3
Figure 17. Test Circuit for S11, S12, S21, S22 Measurements
RF NETWORK ANALYZER
75 S-PARAMETER TEST SET
VOUT1 VIN
4 12
PORT 2
75
DUT
10
06539-018
PORT 1
VOUT2 PORT 3
Figure 18. Test Circuit for S13, S31, S33 Measurements
RF NETWORK ANALYZER
75 S-PARAMETER TEST SET
VOUT1 VIN
4 12
PORT 2
DUT
10
06539-019
PORT 1 75
VOUT2 PORT 3
Figure 19. Test Circuit for S23, S32 Measurements
Rev. 0 | Page 8 of 12
ADA4304-2 APPLICATIONS
The ADA4304-2 active splitter is primarily intended for use in the downstream path of television set-top boxes (STBs) that contain multiple tuners. It is typically located directly after the diplexer in a bidirectional CATV customer premise unit. The ADA4304-2 provides a single-ended input and two singleended outputs that allow the delivery of the RF signal to two different signal paths. These paths can include, but are not limited to, a main picture tuner, the picture-in-picture (PIP) tuner, an out-of-band (OOB) tuner, a digital video recorder (DVR), and a cable modem (CM). The ADA4304-2 exhibits composite second order (CSO) and composite triple beat (CTB) products that are -62 dBc and -72 dBc, respectively. The use of the SiGe bipolar process also allows the ADA4304-2 to achieve a noise figure (NF) of 4 dB.
EVALUATION BOARDS
The ADA4304-2 evaluation board allows designers to assess the performance of the parts in their particular application. The board includes 75 coaxial connectors and 75 controlledimpedance signal traces that carry the input and output signals. Power (5 V) is applied to the red VCC loop connector, and ground is connected to the black GND loop connector. Figure 20 is a schematic of the ADA4304-2 evaluation board. On the ADA4304-2 evaluation board, connectors VO1 and VO4 are not populated.
RF LAYOUT CONSIDERATIONS
Appropriate impedance matching techniques are mandatory when designing circuit boards for the ADA4304-2. Improper characteristic impedances on traces can cause reflections that can lead to poor linearity. The characteristic impedance of the signal trace to the input and from each output should be 75 . Any ground metal on the top surface near signal lines should be stitched with vias to the internal ground plane, as shown in Figure 21.
CIRCUIT DESCRIPTION
The ADA4304-2 consists of a low noise buffer amplifier followed by a resistive power divider. This arrangement provides 2.8 dB of gain relative to the RF signal present at the input of the device. The input and each output must be properly matched to a 75 environment for distortion and noise performance to match the data sheet specifications. AC coupling capacitors of 0.01 F are recommended for the input and outputs. A 1 H RF choke (Coilcraft chip inductor 0805LS-102X) is required to correctly bias internal nodes of the ADA4304-2. It should be connected between the 5 V supply and the IL pin (Pin 14). The choke should be placed as close as possible to the ADA4304-2 to minimize parasitic capacitance on the IL pin, which is critical for achieving the specified bandwidth and flatness.
GND VCC
POWER SUPPLY
The 5 V supply should be applied to each of the VCC pins and RF choke via a low impedance power bus. The power bus should be decoupled to ground using a 10 F tantalum capacitor and a 0.1 F ceramic chip capacitor located close to the ADA4304-2. In addition, the VCC pins should be decoupled to ground with a 0.1 F ceramic chip capacitor located as close to each of the pins as possible.
C5 10F
+
L1 1.0H
C1 0.1F
16 15 14 13
VCC
C8 0.1F C2 0.01F
1 2 3 4
VCC
VCC VCC GND
GND GND GND
VOUT1
12 11 10 9
C3 0.01F VO2 C4 0.01F VO3
IL
ADA4304-2
VIN
VOUT2 GND
NC
VIN
5
NC = NO CONNECT
6
78
06539-003
Figure 20. Evaluation Board Schematic
Rev. 0 | Page 9 of 12
NC
GND
ADA4304-2
06539-020
Figure 21. ADA4304-2 Evaluation Board
Figure 22. Evaluation Board Component Layout
Rev. 0 | Page 10 of 12
06539-021
ADA4304-2 OUTLINE DIMENSIONS
3.00 BSC SQ 0.45 PIN 1 INDICATOR TOP VIEW 2.75 BSC SQ 0.50 BSC 12 MAX 1.00 0.85 0.80 SEATING PLANE 0.30 0.23 0.18 0.80 MAX 0.65 TYP 0.05 MAX 0.02 NOM 0.20 REF 1.50 REF
9 8
0.60 MAX
0.50 0.40 0.30
PIN 1 INDICATOR 1.25 1.10 SQ 0.95
13 12
EXPOSED PAD
16 1
(BOTTOM VIEW) 4
5
0.25 MIN
COMPLIANT TO JEDEC STANDARDS MO-220-VEED-2
Figure 23. 16-Lead Lead Frame Chip Scale Package [LFCSP_VQ] 3 mm x 3 mm Body, Very Thin Quad (CP-16-1) Dimensions shown in millimeters
ORDERING GUIDE
Model ADA4304-2ACPZ-RL 1 ADA4304-2ACPZ-R71 ADA4304-2ACPZ-R21
1
Temperature Range -40C to +85C -40C to +85C -40C to +85C
Package Description 16-Lead LFCSP_VQ 16-Lead LFCSP_VQ 16-Lead LFCSP_VQ
Package Option CP-16-1 CP-16-1 CP-16-1
Ordering Quantity 5,000 1,500 250
Branding H0Z H0Z H0Z
Z = RoHS Compliant Part.
Rev. 0 | Page 11 of 12
ADA4304-2 NOTES
(c)2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D06539-0-5/07(0)
Rev. 0 | Page 12 of 12

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